Digital Twin
Real-time chamber mirror
A live virtual mirror of equipment chambers and production lines, supporting predictive maintenance and virtual-to-real calibration.
AI Solutions
AI is standard equipment on every tool
From digital twins and physics-informed simulation to generative lithography and inverse lithography, BETTER brings the most advanced AI models to all nine core process segments — so every tool has a brain from the day it is installed.
The foundation
Four Core Architectures
Every AI deployment we run stands on one of these four architectures, each matched to a different kind of process data and physical problem.
Physics Simulation
Physics-informed surrogates
DeepONet and PINN-class surrogate models trained on physics residuals infer thermal, IR and EM behavior without large simulation datasets.
LithoDreamer
Generative litho model
A generative lithography model that supports exposure-condition exploration and process-window optimization.
ILT
Inverse Lithography Technology
Inverse-designed mask patterns with GPU-accelerated convergence, aligned to advanced-node OPC requirements.
The evidence
AI Benchmark Table
21 representative models (2020–2026) spanning wafer map and SEM defect classification, yield prediction, thermal simulation, IR drop, electromigration, ATPG / BIST, KGD, test time, layout hotspots and e-beam review. Filter by domain, sort by year, or search by keyword.
21 results
| Domain | Model (year) | Core architecture | Input data | Output / metrics | Key results |
|---|---|---|---|---|---|
| Wafer map defect classification | CNN-ESN2026 | ResNet34 + echo state network | Noisy wafer maps | Accuracy (robustness at σ=0.1 noise) | Clean 94.74%, noisy 87.30% |
| Static IR drop | MaxViT / U-Net2026 | MaxViT encoder + U-Net/FPN decoder | Resistance, current and power-pad maps (SPICE converted to images) | MAE, F1 (>90% peak hotspots), inference time | MAE<15×10⁻⁵V, 10–30× faster than NGSPICE |
| Layout hotspots | Explainable GAT (ASP-DAC'26)2026 | Graph attention network (8 heads) | Layout graph (5-dimensional node features, adjacency matrix) | Recall, false alarm rate, explainability | 5–12× less memory than image-based methods |
| Wafer map defect classification | G2LGAN + CNN2025 | Two-stage GAN augmentation + MobileNetV2 | Wafer map images (class-imbalanced data) | Accuracy / F1 / 1-NN (generation quality) | Acc 98.39%, F1 93.01% |
| SEM defect classification | IBM ASMC2025 | ViT (DINOv2) + semi-supervised learning | SEM images (<15 per class) | Classification accuracy | >90% (few-shot) |
| Yield prediction | PDF Exensio2025 | XGBoost + PCA | Inline defect, metrology, e-test and FDC data | Die/wafer pass-fail, precision/recall | Tunable threshold balances overkill/underkill |
| Yield root cause | TSMC Smart Manufacturing2025 | RNN (time-series FDC) + federated learning | Equipment sensor time series, inspection data | Prediction accuracy for yield-impacting defects | ~92% (28–3nm), escape rate -15% |
| Thermal simulation surrogate | DeepOHeat-v12025 | DeepONet + KAN + GMRES refinement | Power maps / floorplan (physics-informed training, no simulation data required) | MAPE, training time, memory | MAPE 0.035%, training -62×, memory -31× |
| 2.5D electro-thermal co-design | TTSV-HMO2025 | Equivalent model + hybrid metaheuristics (PSO+SA) | TTSV pitch, chiplet placement, power density | Temperature/impedance MAE, fitness | Temperature MAE 0.35%, impedance 3.97% |
| Dynamic IR drop | Dual-path spatiotemporal model (DATE'25)2025 | 3D SW-MSA transformer | Window-decomposed power maps (internal/switching/leakage/toggle rate) | Hotspot prediction accuracy | Outperforms 2D/3D CNNs and recurrent U-Net |
| Electromigration | BPINN-EM-Post2025 | Bayesian PINN | Korhonen PDE physics residuals + observations | Uncertainty quantification, lifetime distribution | Overcomes PINN overfitting, supports multi-segment lines |
| ATPG | InF-ATPG2025 | FFR partitioning + QGNN + DQN | Logic state, SCOAP controllability/observability | Backtracks, fault coverage, UFP | Backtracks -55.06%, UFP 0.50% |
| BIST enhancement | LITE2025 | Standard-cell scan enhancement + SCOAP analysis | Netlist hypergraph, CC0/CC1/CObs | Pattern count, random pattern coverage | ATPG patterns -31%, better RPR coverage |
| KGD / outlier detection | GPR / RevTransC / conformal prediction2025 | GPR spatial modeling, unsupervised transformation, conformal QR + CatBoost | Wafer-level parametric test data, WAT | AUROC, DPPM, Vmin interval coverage | Beats DPAT; ~90% Vmin coverage guarantee |
| Test time | GPU real-time adaptive test2025 | GPU-accelerated ML (production deployment) | Real-time test data streams | Test time, defect coverage retention | Blackwell volume production: -25% test time |
| e-beam review | SEMVision H202025 | Deep-learning image classification (continuous retraining) | CFE e-beam images | Review speed, real vs. nuisance defect separation | 3× speed, deployed at 2nm/GAA customers |
| Joint thermal-IR | ThermEDGe / IREDGe2024 | Encoder-decoder CNN | Time-varying power maps, PDN density | IR error (mV), temperature contours | Average IR error 0.053mV |
| Dynamic IR drop | PDNNet2024 | Heterogeneous GNN (PDNGraph) + CNN | PDN structure graph + dynamic current maps | NMAE, speedup | NMAE improved 39.3%, 545× speedup |
| ATPG (commercial) | Synopsys TSO.ai2024 | AI setup tuning (black-box optimization) | Design characteristics, ATPG engine behavior, constraints | Pattern count, coverage, convergence iterations | Patterns -20~25% (over 50% in some cases) |
| Static IR drop | ICCAD'23 winning flow2023 | ConvNeXtV2-Nano + UPerNet | Per-metal-layer resistance maps + effective distance maps | MAE (mV), F1 | MAE 0.075mV, F1 0.56 |
| Electromigration | Dey et al.2020 | 10-layer NN regression + logistic regression classifier | J, L, T, IR drop, MTTF labels (KLU + Black) | R², AMSE, failing-segment detection | Far faster, MTTF on par with exact models |
Sources: public papers and vendor publications (2020–2026).
Deployment flow
How We Deploy AI
Four steps that take a benchmark model from data inventory to continuous learning on your line.
- 01
Data inventory
We audit in-fab FDC sensor time series, inspection images, wafer maps and historical yield data, then assess quality and usability.
- 02
Model selection
Against the benchmark table above, we shortlist architectures by data type and target metric, then validate at small scale.
- 03
FDC / SECS-GEM integration
We connect equipment interfaces and data pipelines, then deploy real-time inference into your production systems.
- 04
Continuous learning
Once live, models keep retraining on new line data so performance improves and accuracy holds over the long run.
Book an AI × equipment assessment
Tell us your tool mix and where your data stands today, and our team will map out the AI architecture that fits and what it should deliver.